Micron to Natural Intelligence Systems
The patent portfolio presents innovative systems for data analysis utilizing state machine engines that integrate configurable elements and memory components to enhance processing efficiency and reliability. Key features include error detection mechanisms for integrity validation, the capability to analyze data streams through programmable memory cells, and specialized routing elements for managing multiple data results. These advancements have potential applications in high-performance computing, real-time data processing, and complex event detection in various industries.
Breadth Distribution
Complexity Distribution
Enforceability Distribution
Infringement Distribution
Patents
| Patent Number | Summary | Breadth | Complexity | Enforceability | Infringement |
|---|---|---|---|---|---|
| 11977977 | This patent protects a data analysis system comprising a host processor and a state machine engine featuring multiple programmable state machine elements with memory cells that analyze different portions of data to generate results, which are selectively provided through a match element, enabling efficient and configurable data processing. |
C
|
D
|
C
|
- |
| 10949290 | This patent protects a data analysis system comprising a host processor and a state machine engine with configurable elements that utilize memory components for processing data, along with an error detection engine that performs integrity validation of configuration data through cyclic redundancy checks to ensure accurate data analysis and response. |
C
|
C
|
C
|
- |
| 10733508 | Patent 10733508 protects a data analysis system that integrates a processor and a state machine engine configured to process data using multiple programmed memory cells and detection elements, enabling selective output of analysis results through a match element, thereby enhancing efficiency and flexibility in data processing tasks. |
C
|
D
|
D
|
- |
| 10402265 | This patent protects a system comprising a host processor and a state machine engine with a configurable block structure that includes an error detection engine utilizing cyclic redundancy checks (CRC) for integrity validation of configuration data, thereby enabling robust data analysis and error management. |
C
|
D
|
C
|
- |
| 10019311 | This patent protects a device featuring a plurality of configurable blocks with integrated data analysis elements and an error detection engine (EDE) that utilizes cyclic redundancy checks (CRC) to validate the integrity of configuration data, ensuring accurate data stream analysis and corrective actions in response to any detected errors. |
B
|
D
|
C
|
- |
| 09886017 | This patent protects a system comprising a state machine engine with programmable elements organized in blocks and rows, which utilize selective coupling of counters and intra-row circuitry to detect conditions and count occurrences of specified events, enabling dynamic data processing and analysis. |
B
|
C
|
D
|
- |
| 09870530 | This patent protects a device and method involving a match element within a state machine that selectively outputs results derived from analyses of data streams processed through multiple elements, utilizing control signals and multiplexers to manage the output of matches generated from different memory cells and detection cells. |
C
|
D
|
C
|
- |
| 09817678 | This patent protects a device that includes a data analysis element with memory cells, a detection cell featuring an AND gate, and intra-group circuitry designed to selectively transmit analysis results to additional data analysis elements, thereby enhancing the routing and processing capabilities of data streams within a computational architecture. |
B
|
C
|
C
|
- |
| 09665083 | This patent protects a device featuring a finite state machine lattice that includes blocks with programmable elements and counters that can be selectively coupled to detect and output signals based on specific conditions, allowing for complex interactions and counting occurrences of detected signals across multiple rows and blocks. |
C
|
C
|
C
|
- |
| 09443156 | The patent protects a device comprising a physical chip with a match element that receives and selectively outputs multiple match results from various state machine elements analyzing a data stream for patterns, incorporating multiple data and control inputs, along with multiplexers for enhanced signal processing and control. |
C
|
D
|
C
|
- |
| 09280329 | This patent protects a device featuring a data analysis element that processes a data stream and outputs an analysis result, which is then received by a detection cell, implemented with a D flip-flop and an AND gate, to enable transmission of the processed result based on received enable and clock signals. |
C
|
B
|
C
|
- |
| 09058465 | The patent protects a method and device for counting operations at a counter that enables detection of conditions through a state machine lattice, allows for decrementing counts, managing outputs based on hold and roll inputs, and includes provisions for cascading with additional counters, thereby providing a robust counting mechanism adaptable for various input conditions. |
C
|
C
|
C
|
- |
Patent Details
11977977
- Methods and systems for data analysis in a state machine
Published: 2024-05-07
This patent protects a data analysis system comprising a host processor and a state machine engine featuring multiple programmable state machine elements with memory cells that analyze different portions of data to generate results, which are selectively provided through a match element, enabling efficient and configurable data processing.
C
Breadth
D
Complexity
C
Enforceability
Claims
Infringement Analysis
10949290
- Validation of a symbol response memory
Published: 2021-03-16
This patent protects a data analysis system comprising a host processor and a state machine engine with configurable elements that utilize memory components for processing data, along with an error detection engine that performs integrity validation of configuration data through cyclic redundancy checks to ensure accurate data analysis and response.
C
Breadth
C
Complexity
C
Enforceability
Claims
Infringement Analysis
10733508
- Methods and systems for data analysis in a state machine
Published: 2020-08-04
Patent 10733508 protects a data analysis system that integrates a processor and a state machine engine configured to process data using multiple programmed memory cells and detection elements, enabling selective output of analysis results through a match element, thereby enhancing efficiency and flexibility in data processing tasks.
C
Breadth
D
Complexity
D
Enforceability
Claims
Infringement Analysis
10402265
- Validation of a symbol response memory
Published: 2019-09-03
This patent protects a system comprising a host processor and a state machine engine with a configurable block structure that includes an error detection engine utilizing cyclic redundancy checks (CRC) for integrity validation of configuration data, thereby enabling robust data analysis and error management.
C
Breadth
D
Complexity
C
Enforceability
Claims
Infringement Analysis
10019311
- Validation of a symbol response memory
Published: 2018-07-10
This patent protects a device featuring a plurality of configurable blocks with integrated data analysis elements and an error detection engine (EDE) that utilizes cyclic redundancy checks (CRC) to validate the integrity of configuration data, ensuring accurate data stream analysis and corrective actions in response to any detected errors.
B
Breadth
D
Complexity
C
Enforceability
Claims
Infringement Analysis
09886017
- Counter operation in a state machine lattice
Published: 2018-02-06
This patent protects a system comprising a state machine engine with programmable elements organized in blocks and rows, which utilize selective coupling of counters and intra-row circuitry to detect conditions and count occurrences of specified events, enabling dynamic data processing and analysis.
B
Breadth
C
Complexity
D
Enforceability
Claims
Infringement Analysis
09870530
- Methods and systems for data analysis in a state machine
Published: 2018-01-16
This patent protects a device and method involving a match element within a state machine that selectively outputs results derived from analyses of data streams processed through multiple elements, utilizing control signals and multiplexers to manage the output of matches generated from different memory cells and detection cells.
C
Breadth
D
Complexity
C
Enforceability
Claims
Infringement Analysis
09817678
- Methods and systems for detection in a state machine
Published: 2017-11-14
This patent protects a device that includes a data analysis element with memory cells, a detection cell featuring an AND gate, and intra-group circuitry designed to selectively transmit analysis results to additional data analysis elements, thereby enhancing the routing and processing capabilities of data streams within a computational architecture.
B
Breadth
C
Complexity
C
Enforceability
Claims
Infringement Analysis
09665083
- Counter operation in a state machine lattice
Published: 2017-05-30
This patent protects a device featuring a finite state machine lattice that includes blocks with programmable elements and counters that can be selectively coupled to detect and output signals based on specific conditions, allowing for complex interactions and counting occurrences of detected signals across multiple rows and blocks.
C
Breadth
C
Complexity
C
Enforceability
Claims
Infringement Analysis
09443156
- Methods and systems for data analysis in a state machine
Published: 2016-09-13
The patent protects a device comprising a physical chip with a match element that receives and selectively outputs multiple match results from various state machine elements analyzing a data stream for patterns, incorporating multiple data and control inputs, along with multiplexers for enhanced signal processing and control.
C
Breadth
D
Complexity
C
Enforceability
Claims
Infringement Analysis
09280329
- Methods and systems for detection in a state machine
Published: 2016-03-08
This patent protects a device featuring a data analysis element that processes a data stream and outputs an analysis result, which is then received by a detection cell, implemented with a D flip-flop and an AND gate, to enable transmission of the processed result based on received enable and clock signals.
C
Breadth
B
Complexity
C
Enforceability
Claims
Infringement Analysis
09058465
- Counter operation in a state machine lattice
Published: 2015-06-16
The patent protects a method and device for counting operations at a counter that enables detection of conditions through a state machine lattice, allows for decrementing counts, managing outputs based on hold and roll inputs, and includes provisions for cascading with additional counters, thereby providing a robust counting mechanism adaptable for various input conditions.
C
Breadth
C
Complexity
C
Enforceability
Claims
Infringement Analysis